CV

Machine Learning Engineer 2

AMD

Contributing to the advancement of ROCm software by developing and optimization of AI models for GPU.

• ROCm GEMM Tuning & Profiling: Tuned GEMM operations (hipBLASLT) for Llama-7b, reducing inference time by ~31%. Optimized Residual kernels and integrated performance profiling, boosting end-to-end model efficiency.
• Performance Optimization for Llama.cpp: Achieved measurable speedups via wavefront-based parallelism, refined memory access patterns, minimized synchronization overhead and rooftop analyses for identifying high-impact kernels and pinpointing non-performant operations
• Cross-GPU Vision Model Profiling: Profiled and improved performance on MI300 vs H100 for vision models, closing the gap from ~61% to ~76%, and generated actionable insights for GEMM and Triton kernel optimization.
• GPU Acceleration & CuPy Contributions: Drove CuPy’s ROCm platform enablement by hipifying NVTX, resolving failing unit tests, and merging major ROCm branches, enhancing GPU support and code reliability.
• Skills: Deep Learning Acceleration · Computer Architecture · Machine Learning Systems

Graduate Research Assistant at Speed Lab

CMU

Designed high performant hardware aware CPU and GPU kernels for Computer Vision algorithms

• Leveraged performance engineering techniques like instruction pipelining, tiling, memory optimization, vectorizing, occupancy optimization to maximize hardware utilization
• Achieving 17% speedup benchmarked against OpenCV C++ kernel
• Skills: C++ · SIMD · Deep Learning Acceleration · Computer Vision · Computer Architecture

Graduate Research Assistant at Catalyst Lab

CMU

Accelerating LLM inference through the speculative decoding process. Implementing a teacher-student model to propose candidate sequences for the large model to verify

• Achieving 2X-3X speedup without altering outputs, by parallelizing token computation
• Engineered a compiler system for deep learning graph optimization and op-fusion targeting mobile backends with heterogeneous computer architecture.
• Implemented a kernel mapping strategy leveraging TVM and TASO, enhancing performance
• Skills: Compiler Optimization · Deep Learning Acceleration · TVM · CUDA · Android NDK

Applied Machine Learning System Architecture Engineering Intern

AMD

Explored optimal model size and inference latency on AMD’s AI accelerator. Utilized Quantization techniques to achieve significant model size reduction and latency improvements.

• Discovered Quantization Aware Training of an Autoencoder yielded 10x size reduction & reduced latency by 23% within 2% accuracy loss
• Proactive troubleshooting of time critical issues within Vitis AI’s production software stack enabling deployment
• Team: Advanced Technology Group: System Architecture team (Under Radeon Technology Group)
• Skills: C++ · Computer Vision · Deep learning · PyTorch

Graduate Research Assistant at Wise Lab

CMU

Developed simulated environment of resource prediction on edge with JAX and Reinforcement learning for performance modeling

• Skills: JAX · Probablistic Modelling

Accident Research Intern

Bosch

Designed an end-to-end system to predict accident-prone junction areas on Indian roads with 88% accuracy.

• Skills: Data Analysis · Deep Learning

AI/ML and IoT Developer

Konwert India Motors

Developed a custom LSTM model for predicting the health of electric vehicles, achieving significant improvements over previous models.

IoT Embedded and Full-stack Developer

Stackfusion

Developed and optimized end-to-end IoT solutions, integrating AI models for real-time data processing and edge computing.

• Engineered data pipelines for edge devices (Jetson Nano) using Gstreamer, NVIDIA Deepstream, and WebRTC to enable real-time video streaming and processing.
• Led the deployment and configuration of IoT devices at ground level, ensuring seamless integration with cloud-based services and user interfaces.
• Developed and fine-tuned Automatic Number Plate Recognition (ANPR) models using OpenCV and TensorFlow for improved accuracy in real-world scenarios.

Masters in Science

Carnegie Mellon University

Electrical and Computer Engineering

• Intro to Deep Learning
• Modern Computer Architecture
• On Device ML
• How to Write Fast Code: GPU Parallel Programming
• Optimization
• Visual Learning and Recognition
• Large Language Models
• Deep Learning Systems

Bachelors in Technology

SRM Institute of Science and Technology

Major: Electronics and Communication Engineering, Minor: Computer Science and Engineering

• Best Bachelors Thesis
• 2nd at Github Hackathon
• 10th at Bosch Hackathon
• Won SIIC projects
• Published a sponsored patent

Stress testing and Improved performance of Asymmetric cores of SoC

• Stress tested the SoC using benchmarks Dhrystone and Linpack. Achieved 6% misprediction rate, 10% L1 miss rate and bottlenecked L2 cache by 45% miss rate
• Wrote programs with low instruction-level parallelism, multithreaded program with high ILP and a hybrid (both low and high ILP ) program for maximizing the performance-power trade offs of asymmetric cores.

Swin-Vision Transformer for edge device

Optimized vision transformers for edge devices, achieving significant memory and latency savings.

• Linearized self-attention in Transformers for Jetson Nano achieving 14-20% memory and 2-3% latency savings
• Leveraging (q, k, v) low-rank structures, applied LoRa approx. to the self-attention weight matrices and harnessed SVD in attention block for efficient matrix operations allowed optimizing vision transformers saving, 18% GFLOPS with 2% accuracy drop